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Parity Bit

A parity bit is the simplest error detection code – a single bit added to make the total number of 1-bits even (even parity) or odd (odd parity). Parity detects all single-bit errors but cannot detect even numbers of flipped bits. Used in serial communication (RS-232) and RAM (ECC memory uses extended Hamming codes).

Definition

Parity is a 1-bit error detection mechanism. The sender counts the number of 1-bits in the data and sets the parity bit to make the total even (even parity) or odd (odd parity). The receiver performs the same count – if parity does not match, at least one bit flipped during transmission. Parity cannot identify which bit is wrong (no correction capability) and cannot detect two simultaneous bit flips (they cancel out). Serial protocols like RS-232 use parity for each byte (7 data bits + 1 parity = 8 bits). Modern networks rely on CRC-32 (Ethernet) and checksums (TCP/IP) which provide far stronger error detection. ECC RAM uses a form of Hamming code that extends parity to detect double-bit errors and correct single-bit errors. In networking, parity alone is insufficient – it exists mainly in legacy serial and storage interfaces.

Examples

  • –Data: 1011001 + even parity bit 0 (four 1-bits = already even)
  • –stty -F /dev/ttyS0 parenb – enable parity on serial port
  • –RAID-5 uses distributed parity for single-disk failure recovery

Related Terms

Checksum

A checksum is a value computed from packet data used to detect transmission errors. TCP, UDP, and IP headers include checksums. The receiver recomputes the checksum on arrival – if it does not match, the packet is silently discarded. Checksums detect accidental corruption but not malicious tampering (use HMAC for that).

CRC (Cyclic Redundancy Check)

CRC is an error-detection code used at Layer 2 to verify frame integrity. Ethernet uses CRC-32 in the Frame Check Sequence (FCS) trailer. CRC detects burst errors up to 32 bits long with 99.99% probability. NICs that receive frames with bad CRC discard them silently – incrementing an interface error counter.